Technical Symposium on Reconfigurable Computing with FPGAs - Abstracts

Reconfigurable Computing Within SGI's System Architecture

Mike Woodacre, Chief Engineer - Systems Architecture, SGI

This talk will cover the use of reconfigurable processing elements within SGI's NUMAflex system architecture. The benefits of this approach, providing a scalable solution for reconfigurable processing, tightly coupled to the global shared memory architecture that other processing elements in the system use, will be addressed. Also covered are the tools and software stack for efficiently integrating reconfigurable technology with general purpose processing.

Engineering Applications on NASA's FPGA-based Hypercomputer

Olaf O. Storaasli, Sr Research Scientist, NASA Langley

This purpose of this presentation is to describe how NASA Langley's reconfigurable Field Programmable Gate Array (FPGA)-based hypercomputer research is addressing the solution of comprehensive engineering and scientific calculations. Two approaches are used to exploit Langley's Star Bridge Hypercomputer Systems for analysis calculations:

1. Develop analyses codes in VIVA for Hypercomputer (fully exploits parallelism)
2. Use Hyercomputer to accelerate time-consuming (bottleneck) calculations

NASA FPGA-based research initially focused on rapid structural analysis, but has now been extended to include linear algebra, matrix equation solution and integration (Runge-Kutta for fluid dynamics and Newmark-Beta for finite element structural mechanics). The presentation builds on previous NASA research and describes "lessons learned", via close Starbridge collaboration, to overcome early HAL-15 and VIVA limitations, which has led to rapid and accurate scientific and engineering analysis calculations.

Where the Theory Becomes Reality: Nallatech Delivers FPGA Computing for HPC Applications

Allan Cantle, President and CEO, Nallatech

With over 10 years of experience in FPGA systems and over 1000 system installations worldwide, Nallatech is the established expert in FPGA Computing. Our experience with customers in multiple HPC application areas, enables us to understand the needs of users who want to accelerate algorithms using FPGA technology. With FPGA computing solutions including single and double precision floating point capability, Nallatech leads the industry in delivering FPGA accelerated HPC applications.

Implementing HPC Algorithms in FPGA Accelerated Systems

Steve Chappell, Director of Applications Engineering, Celoxica

There are compelling reasons to consider "FPGA Accelerators" in HPC system infrastructure. They can be a natural choice for accelerating integer-based, wide datapath and massively parallel computation. Moreover, the current generation of devices can enable fast parallel floating-point calculations in many applications.

Managing the complexity of FPGA hardware design in a predominantly software driven application sector is a particular challenge for the development of reconfigurable computing applications. We will describe a software-compiled system design methodology using C-synthesis and hardware-software partitioning tools that overcomes these challenges. Unlike traditional hardware design or block based design entry, these technologies provide a practical and familiar design flow for HPC application developers to explore the acceleration of software systems.